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1 ISL31480E, isl31483e, isl31485e, isl31486e fault protected, extended cmr, rs-485/rs-422 transceivers with cable invert ISL31480E, isl31483e , isl31485e, isl31486e the isl3148xe are fault protected, 5v powered differential transceivers that exceed the rs-485 and rs-422 standards for balanced communication. the rs-485 transceiver pins (driver outputs and receiver inputs) are protected against faults up to 60v. additionally, the extended common mode range allows these transceivers to oper ate in environments with common mode voltages up to 25v (>2x the rs-485 requirement), making this rs-485 family one of the most robust on the market. transmitters deliver an exceptional 2.5v (typical) differential output voltage into the rs-485 specified 54 load. this yields better nois e immunity than standard rs-485 ics, or allows up to six 120 terminations in star network topologies. receiver (rx) inputs feature a ?full fail-safe? design, which ensures a logic high rx output if rx inputs are floating, shorted, or on a terminated but undriven (idle) bus. the isl31483e, isl31485e and isl31486e include cable invert functions that reverse the polarity of the rx and/or tx bus pins in case the cable is misconnected. unlike competing devices, rx full fail-safe operation is maintained even when the rx input polarity is switched. the ISL31480E and isl31486e feature a logic supply (v l ) pin that sets the v oh of the rx outputs, and the switching points of the logic input pins, to be compatible with a lower supply voltage (down to 1.8v) in mixed voltage systems. see table 1 on page 2 for key features and configurations by device number. features ? fault protected rs-485 bus pins. . . . . . up to 60v ? extended common mode range . . . . . . . . . . 25v more than twice the range required for rs-485 ? cable invert pins (except isl31480) corrects for reversed cable connections while maintaining rx full fail-safe functionality ? logic supply (v l ) pin (ISL31480E, isl31486e) simplifies interface to lower voltage logic devices ? full fail-safe (open, short, terminated) rs-485 receivers ? 1/4 unit load (ul) for up to 128 devices on the bus ?high rx i ol for opto-couplers in isolated designs ? hot plug circuitry - tx and rx outputs remain three-state during power-up/power-down ? slew rate limited rs-485 data rate . . . . . . 1mbps ? low quiescent supply current . . . . . . . . . . . 2.3ma ultra low shutdown supply current . . . . . . . . 10a applications* (see page 19) ? utility meters/automated meter reading systems ? high node count systems ? profibus? and field bus networks, and factory automation ? security camera networks ? building lighting and environmental control systems ? industrial/process control networks exceptional rx operates at 1mbps even with 25v common mode voltage transceivers deliver superior common mode range vs. standard rs-485 devices -5 0 5 10 15 20 25 30 time (400ns/div) voltage (v) b vid = 1v a ro isl3148xe common mode range closest competitor standard rs-485 transceiver -25 -20 -12 -7 0 12 25 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2010. all rights reserved all other trademarks mentioned are the property of their respective owners. june 25, 2010 fn7638.0
ISL31480E, isl31483e, isl31485e, isl31486e 2 fn7638.0 june 25, 2010 table 1. summary of features part number half/full duplex data rate (mbps) slew- rate limited? en pins? hot plug v l pin? polarity reversal pins? quiescent i cc (ma) low power shdn? pin count coming soon ISL31480E half 1 yes yes yes yes no 2.3 yes 10 isl31483e full 1 yes yes yes no yes 2.3 yes 14 isl31485e half 1 yes tx only yes no yes 2.3 no 8 coming soon isl31486e half 1 yes yes yes yes yes 2.3 yes 10, 12, 14 ordering information part number (notes 1, 2, 3) part marking temp. range (c) package (pb-free) pkg. dwg. # coming soon ISL31480Eirtz 480e -40 to +85 10 ld tdfn l10.3x3a coming soon ISL31480Eiuz 1480e -40 to +85 10 ld msop m10.118 isl31483eibz isl31483 eibz -40 to +85 14 ld soic m14.15 isl31485eibz 31485 eibz -40 to +85 8 ld soic m8.15 coming soon isl31486eibz isl31486 eibz -40 to +85 14 ld soic m14.15 coming soon isl31486eirtz 486e -40 to +85 12 ld tdfn l12.4x3a coming soon isl31486eiuz 1486e -40 to +85 10 ld msop m10.118 notes: 1. add ?-t? suffix for tape and reel. please refer to tb347 for details on reel specifications. 2. these intersil pb-free plastic packaged products employ special pb-free material sets, molding compounds/die attach materials, and 100% matte tin pl ate plus anneal (e3 termination finish, which is rohs compliant and compatible with both snpb and pb-free soldering operations). intersil pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. 3. for moisture sensitivity level (msl), please see device information page for ISL31480E, isl31483e, isl31485e, and isl31486e . for more information on msl please see techbrief tb363 . pin configurations isl31483e (14 ld soic) top view isl31485e (8 ld soic) top view rinv ro re de di gnd gnd v cc v cc a b z y dinv 1 2 3 4 5 6 7 14 13 12 11 10 9 8 d r ro inv de di 1 2 3 4 8 7 6 5 v cc b/z a/y gnd d r
ISL31480E, isl31483e, isl31485e, isl31486e 3 fn7638.0 june 25, 2010 pin descriptions pin name ISL31480E pin # isl31483e pin # isl31485e pin # isl31486e (12 ld) pin # isl31486e (10 ld) pin # isl31486e (14 ld) pin # function ro221111receiver output. on the ISL31480E, or if inv or rinv is low, then: if a - b -10mv, ro is high; if a - b -200mv, ro is low. if inv or rinv is high, then: if b - a -10mv, ro is high; if b - a -200mv, ro is low. in all cases, ro = high if a and b are unconnected (floating), or shorted together, or connected to an undriven, terminated bus (i.e., rx is always failsafe open, shorted, and idle, even if polarity is inverted). re 43n/a222receiver output enable. ro is enabled when re is low; ro is high impedance when re is high. internally pulled low. de343444driver output enable. the driver outputs, y and z, are enabled by bringing de high, and they are high impedance when de is low. internally pulled high (to v l on ISL31480E and isl31486e; to v cc on other versions). di554556driver input. on the ISL31480E, or if inv or dinv is low, a low on di forces output y low and output z high, while a high on di forces output y high and output z low. the output states relative to di invert if inv or dinv is high. gnd 6 6, 7 5 7, 8 6 8, 9 ground connection.this is also the potential of the tdfn epad. a/y 8 n/a 6 9 7 11 60v fault protected rs-485/rs-422 level i/o pin. on the ISL31480E, or if inv is low, a/y is the non-inverting receiver input and non-inverting driver output. if inv is high, a/y is the inverting receiver input and the inverting driver output. pin is an input if de = 0; pin is an output if de = 1. b/z 9 n/a 7 10 8 12 60v fault protected rs-485/rs-422 level i/o pin. on the ISL31480E, or if inv is low, b/z is the inverting receiver input and inverting driver output. if inv is high, b/z is the non-inverting receiver input and the non- inverting driver output. pin is an input if de = 0; pin is an output if de = 1. a n/a 12 n/a n/a n/a n/a 60v fault protected rs-485/rs-422 level input. if rinv is low, then a is the non-inverting receiver input. if rinv is high, then a is the inverting receiver input.
ISL31480E, isl31483e, isl31485e, isl31486e 4 fn7638.0 june 25, 2010 b n/a 11 n/a n/a n/a n/a 60v fault protected rs-485/rs-422 level input. if rinv is low, then b is the inverting receiver input. if rinv is high, then b is the non-inverting receiver input. y n/a 9 n/a n/a n/a n/a 60v fault protected rs-485/rs-422 level output. if dinv is low, then y is the non- inverting driver output. if dinv is high, then y is the inverting driver output z n/a 10 n/a n/a n/a n/a 60v fault protected rs-485/rs-422 level. if dinv is low, then z is the inverting driver output. if dinv is high, then z is the non-inverting driver output v cc 10 13, 14 8 11 9 13 system power supply input (4.5v to 5.5v). v l 1 n/a n/a 12 10 14 logic-level supply input (1.62v to v cc ) which powers all the ttl/cmos inputs and the ro output (logic pins). v l sets the v ih and v il levels for logic input pins, and sets the v oh level for the ro pin. power up this supply after v cc , and keep v l v cc . to minimize input current, logic input pins that are strapped high externally should connect to v l , but they may be connected to v cc if necessary. inv n/a n/a 2 3 3 3 receiver and driver polarity selection input. wh en driven high this pin swaps the polarity of the driver output and receiver input pins. if unconnected (floating) or connected low, normal rs-485 polarity conventions apply. internally pulled low. rinv n/a 1 n/a n/a n/a n/a receiver polarity selection input. when driven high this pin swaps the polarity of the receiver input pins. if unconnected (floating) or connected low, normal rs-485 polarity conventions apply. internally pulled low. dinv n/a 8 n/a n/a n/a n/a driver polarity selection input. when driven high this pin swaps the polarity of the driver output pins. if unconnected (floating) or connected low, normal rs-485 polarity conventions apply. internally pulled low. pd tdfn only n/a n/a epad n/a n/a tdfn exposed thermal pad (epad). connect to gnd. nc 7 n/a n/a 6 n/a 5, 7, 10 no internal connection. pin descriptions (continued) pin name ISL31480E pin # isl31483e pin # isl31485e pin # isl31486e (12 ld) pin # isl31486e (10 ld) pin # isl31486e (14 ld) pin # function
ISL31480E, isl31483e, isl31485e, isl31486e 5 fn7638.0 june 25, 2010 truth tables transmitting inputs outputs re de di inv or dinv yz x11 0 1 0 x10 0 0 1 x11 1 0 1 x10 1 1 0 0 0 x x high-z high-z 10x xhigh-z*high-z* note: *low power shutdown mode (see note 13), except for isl31485e. receiving inputs output re de (half duplex) de (full duplex) a-b inv or rinv ro 00 x -0.01v 0 1 00 x -0.2v 0 0 00 x 0.01v 1 1 00 x 0.2v 1 0 00 xinputs open or shorted x1 10 0 x xhigh-z* 11 1 x xhigh-z note: *low power shutdown mo de (see note 13), except for isl31485e. typical operating circuits isl31486e half duplex example (msop pin numbers shown) 0.1f + d r 7 8 9 1 2 4 5 6 v cc gnd ro re de di b/z a/y +5v r t r t 0.1f + 10 v l +1.8v inv 3 0.1f + d r 8 7 9 1 2 4 5 6 v cc gnd ro re de di a/y b/z +5v 0.1f + 10 v l +1.8v inv 3 the ic on the left has the cable connections swapped, so the inv pin is strapped high to invert its rx and tx polarity
ISL31480E, isl31483e, isl31485e, isl31486e 6 fn7638.0 june 25, 2010 isl34183e full duplex example (soic pin numbers shown) typical operating circuits (continued) 0.1f + d r 11 12 9 10 13, 14 2 3 4 5 6, 7 v cc gnd ro re de di b a z y +5v 0.1f + d r 12 11 10 9 13, 14 2 3 4 5 6, 7 v cc gnd ro re de di a b y z +5v r t r t dinv 1 the ic on the left has the cable connections swapped, so the inv pins (1, 8) are strapped high to invert its rx and tx polarity 8 rinv rinv dinv 1 8
ISL31480E, isl31483e, isl31485e, isl31486e 7 fn7638.0 june 25, 2010 table of contents ordering information .......................................................................................................... ............... 2 pin configuration ............................................................................................................. ................... 3 pin descriptions ............................................................................................................... ................... 3 truth tables ................................................................................................................... ..................... 6 typical operating circuits..................................................................................................... ............... 6 absolute maximum ratings ....................................................................................................... ......... 9 thermal information ............................................................................................................ .............. 9 recommended operating conditions ............................................................................................... ... 9 electrical specifications ..................................................................................................... ................ 9 test circuits and waveforms .................................................................................................... ......... 12 application information ........................................................................................................ ............ 15 receiver (rx) features ......................................................................................................... ........... 15 driver (tx) features ........................................................................................................... ............. 15 high overvoltage (fault) protection increases ruggedness .... ............................................................... 15 widest common mode voltage (cmv) tolerance improves op erating range............................................ 15 cable invert (polarity reversal) function ...................................................................................... ...... 15 logic supply (vl pin).......................................................................................................... ............. 16 high vod improves noise immunity and fl exibility........... ........... ............ ........... ........ ......... ........ ........ 16 hot plug function .............................................................................................................. .............. 17 data rate, cables, and terminations ............................................................................................ ..... 17 built-in driver overload protection ........................... ................................................................. ........ 17 low power shutdown mode ........................................................................................................ ...... 17 typical performance curves ..................................................................................................... ........ 18 die characteristics ............................................................................................................ ................ 19 revision history ............................................................................................................... ................. 20 products ....................................................................................................................... ..................... 20 package outline drawing ....................................................................................................... .......... 21 package outline drawing ....................................................................................................... .......... 22 package outline drawing ....................................................................................................... .......... 23 package outline drawing ....................................................................................................... .......... 24 package outline drawing ....................................................................................................... .......... 25
ISL31480E, isl31483e, isl31485e, isl31486e 8 fn7638.0 june 25, 2010 absolute maximum ratings thermal information v cc to ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7v input voltages di, inv, rinv, dinv, de, re . . . . . . -0.3v to (v cc + 0.3v) input/output voltages a/y, b/z, a, b, y, z . . . . . . . . . . . . . . . . . . . . . . . . 60v a/y, b/z, a, b, y, z (t ransient pulse through 100 , note 19) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80v ro (ISL31480E, isl31486e) . . . . . . . -0.3v to (v l +0.3v) ro (isl31483e, isl31485e) . . . . . . -0.3v to (v cc +0.3v) short circuit duration y, z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . indefinite esd rating . . . . . . . . . . . . . . . . . . see specification table latch-up per jesd78, level 2, class a . . . . . . . . . . +125c recommended operating conditions supply voltage (v cc ) . . . . . . . . . . . . . . . . . . . . . . . . . 5v logic supply voltage (v l ) . . . . . . . . . . . . . . . 1.62v to v cc temperature range. . . . . . . . . . . . . . . . . . -40c to +85c bus pin common mode voltage range . . . . . . -25v to +25v thermal resistance (typical) ja (c/w) jc (c/w) 8 ld soic package (notes 4, 6) . . 116 47 10 ld msop package (notes 4, 6) . 135 50 10 ld tdfn package (notes 5, 7) . 58 7 12 ld tdfn package (notes 5, 7) . 35 3 14 ld soic package (notes 4, 6). . 88 38 maximum junction temperature (plastic package) . +150c maximum storage temperature range . . -65c to +150c pb-free reflow profile . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/pb-freereflow.asp caution: do not operate at or near the maximum ratings listed for extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. note: 4. ja is measured with the component mounted on a high effective thermal conductivity test board in free air. see tech brief tb379 for details. 5. ja is measured in free air with the component mounted on a high effective thermal conductivity test board with ?direct attach? features. see tech brief tb379 for details. 6. for jc , the ?case temp? location is taken at the package top center. 7. for jc , the ?case temp? location is the center of the exposed metal pad on the package underside. electrical specifications test conditions: v cc = 4.5v to 5.5v, v l = v cc ; unless otherwise specified. typicals are at v cc = 5v, t a = +25c (note 8). boldface limits apply over the operating temperature range, -40c to +85c. parameter symbol test conditions temp (c) min (note 16) typ max (note 16) units dc characteristics driver differential v out (no load) v od1 full - - v cc v driver differential v out (loaded, figure 1a) v od2 r l = 100 (rs-422) full 2.4 3.2 - v r l = 54 (rs-485) full 1.5 2.5 v cc v r l = 54 (profibus, v cc 5v) full 2.0 2.5 - v r l = 21 (six 120 terminations for star configurations, v cc 4.75v) full 0.8 1.3 - v change in magnitude of driver differential v out for complementary output states v od r l = 54 or 100 (figure 1a) full - - 0.2 v driver differential v out with common mode load (figure 1b) v od3 r l = 60 , -7v v cm 12v full 1.5 2.1 v cc v r l = 60 , -25v v cm 25v (v cc 4.75v) full 1.7 2.3 v r l = 21 , -15v v cm 15v (v cc 4.75v) full 0.8 1.1 - v driver common-mode v out (figure 1) v oc r l = 54 or 100 full -1 - 3 v r l = 60 or 100 , -20v v cm 20v full -2.5 - 5 v
ISL31480E, isl31483e, isl31485e, isl31486e 9 fn7638.0 june 25, 2010 change in magnitude of driver common-mode v out for complementary output states dv oc r l = 54 or 100 (figure 1a) full - - 0.2 v driver short-circuit current i osd de = v cc , -25v v o 25v (note 10) full -250 - 250 ma i osd1 at first fold-back, 22v v o -22v full -83 83 ma i osd2 at second fold-back, 35v v o -35v full -13 13 ma logic input high voltage v ih1 de, di, re , inv, rinv, dinv v l = v cc if applicable full 2.5 -- v v ih2 de, di, re , inv, (only ISL31480E, isl31486e) 2.7v v l 3v full 2 -- v v ih3 2.3v v l < 2.7v full 1.7 -- v v ih4 1.6v v l < 2.3v full 0.7*v l -- v logic input low voltage v il1 de, di, re , inv, rinv, dinv v l = v cc if applicable full - - 0.8 v v il2 de, di, re , inv, (only ISL31480E, isl31486e) 2.7v v l 3v full - - 0.8 v v il3 2.3v v l < 2.7v full - - 0.65 v v il4 1.6v v l < 2.3v full - - 0.3*v l v logic input current i in1 di full -1 - 1 a de, re , inv, rinv, dinv full -15 6 15 a input/output current (a/y, b/z) i in2 de = 0v, v cc = 0v or 5.5v v in = 12v full - 110 250 a v in = -7v full -200 -75 - a v in = 25v full -800 240 800 a v in = 60v (note 20) full -6 0.7 6 ma input current (a, b) (full duplex versions only) i in3 v cc = 0v or 5.5v v in = 12v full - 90 125 a v in = -7v full -100 -70 - a v in = 25v full -500 200 500 a v in = 60v (note 20) full -3 0.5 3 ma output leakage current (y, z) (full duplex versions only) i ozd re = 0v, de = 0v, v cc = 0v or 5.5v v in = 12v full - 20 200 a v in = -7v full -100 -5 - a v in = 25v full -500 40 500 a v in = 60v (note 20) full -3 0.15 3 ma receiver differential threshold voltage v th a-b for ISL31480E or if inv or rinv = 0; b-a if inv or rinv = 1, -25v v cm 25v full -200 -100 -10 mv receiver input hysteresis dv th -25v v cm 25v 25 - 25 - mv receiver output high voltage v oh1 v id = -10mv, v l = v cc if applicable i o = -2ma full v cc - 0.5 4.75 - v v oh2 i o = -8ma full 2.8 4.2 - v v oh3 v id = -10mv, only ISL31480E, isl31486e v l 2.7v, i o = -1.5ma full v l -0.3 -v v oh4 v l 2.3v, i o = -1ma full v l -0.3 -v v oh5 v l 1.6v , i o = -500ma full v l -0.25 -v electrical specifications test conditions: v cc = 4.5v to 5.5v, v l = v cc ; unless otherwise specified. typicals are at v cc = 5v, t a = +25c (note 8). boldface limits apply over the operating temperature range, -40c to +85c. (continued) parameter symbol test conditions temp (c) min (note 16) typ max (note 16) units
ISL31480E, isl31483e, isl31485e, isl31486e 10 fn7638.0 june 25, 2010 receiver output low voltage v ol i o = 6ma, v l 1.6v , v id = -200mv full - 0.27 0.4 v receiver output low current i ol v o = 1v, v l 1.6v , v id = -200mv full 15 22 - ma three-state (high impedance) receiver output current i ozr 0v v o v l (if applicable) or v cc (note 19) full -1 0.01 1 a receiver short-circuit current i osr 0v v o v cc , v l = v cc if applicable full 12 - 110 ma supply current no-load supply current (note 9) i cc de = v cc , re =0v or v cc , di = 0v or v cc full - 2.3 4.5 ma shutdown supply current i shdn de = 0v, re = v cc , di = 0v or v cc (note 19) full - 10 50 a esd performance all pins human body model (tested per jesd22-a114e) 25 - 2 - kv machine model (tested per jesd22-a115-a) 25 - 700 - v driver switching characteristics driver differential output delay t plh, t phl r d = 54 , c d = 50pf (figure 2) no cm load full - 70 125 ns -25v v cm 25v full - - 350 ns driver differential output skew t skew r d = 54 , c d = 50pf (figure 2) no cm load full - 4.5 15 ns -25v v cm 25v full - - 25 ns driver differential rise or fall time t r , t f r d = 54 , c d = 50pf (figure 2) no cm load full 70 230 300 ns -25v v cm 25v full 70 - 400 ns maximum data rate f max c d = 820pf, v l 1.6v (figure 4) full 1 4 - mbps driver enable to output high t zh sw = gnd (figure 3), (note 11) full - - 350 ns driver enable to output low t zl sw = v cc (figure 3), (note 11) full - - 300 ns driver disable from output low t lz sw = v cc (figure 3) full - - 120 ns driver disable from output high t hz sw = gnd (figure 3) full - - 120 ns time to shutdown t shdn (notes 13, 19) full 60 160 600 ns driver enable from shutdown to output high t zh(shdn) sw = gnd (figure 3), (notes 13, 14, 19) full - - 2000 ns driver enable from shutdown to output low t zl(shdn) sw = v cc (figure 3), (notes 13, 14, 19) full - - 2000 ns receiver switching characteristics maximum data rate f max -25v v cm 25v (figure 5) full 1 15 - mbps -15v v cm 15v, v l 1.6v (figure 5) full 1 12 - mbps receiver input to output delay t plh , t phl -25v v cm 25v (figure 5) full - 90 150 ns electrical specifications test conditions: v cc = 4.5v to 5.5v, v l = v cc ; unless otherwise specified. typicals are at v cc = 5v, t a = +25c (note 8). boldface limits apply over the operating temperature range, -40c to +85c. (continued) parameter symbol test conditions temp (c) min (note 16) typ max (note 16) units
ISL31480E, isl31483e, isl31485e, isl31486e 11 fn7638.0 june 25, 2010 receiver skew | t plh - t phl | t skd (figure 5) full - 4 10 ns receiver enable to output low t zl r l = 1k , c l = 15pf, sw = v cc (figure 6), (notes 12, 19) full - - 50 ns receiver enable to output high t zh r l = 1k , c l = 15pf, sw = gnd (figure 6), (notes 12, 19) full - - 50 ns receiver disable from output low t lz r l = 1k , c l = 15pf, sw = v cc (figure 6) (note 19) full - - 50 ns receiver disable from output high t hz r l = 1k , c l = 15pf, sw = gnd (figure 6) (note 19) full - - 50 ns time to shutdown t shdn (notes 13, 19) full 60 160 600 ns receiver enable from shutdown to output high t zh(shdn) r l = 1k , c l = 15pf, sw = gnd (figure 6), (notes 13, 15, 19) full - - 2000 ns receiver enable from shutdown to output low t zl(shdn) r l = 1k , c l = 15pf, sw = v cc (figure 6), (notes 13, 15, 19) full - - 2000 ns notes: 8. all currents into device pins are positive; all currents out of device pins are negative. all vo ltages are referenced to devi ce ground unless otherwise specified. 9. supply current specification is vali d for loaded drivers when de = 0v. 10. applies to peak current. see ?typical performance curves? beginning on page 18 for more information 11. keep re = 0 to prevent the device from entering shdn. 12. the re signal high time must be short enough (typic ally <100ns) to prevent the device from entering shdn. 13. transceivers (except on the isl31485e) are put into shutdown by bringing re high and de low. if the inputs are in this state for less than 60ns, the parts are guaranteed not to enter shutdown. if the inputs are in this state for at least 600ns, the par ts are guaranteed to have entered shutdown . see ?low power shutdown mode? on page 17. 14. keep re = vcc, and set the de signal low time >600 ns to ensure that th e device enters shdn. 15. set the re signal high time >600ns to ensure that the device enters shdn. 16. parameters with min and/or max limits are 100% tested at + 25c, unless otherwise specified. temperature limits established by characterization and ar e not production tested. 17. see figure 9 for more information, and for perfo rmance over-temperature. 18. tested according to tia/eia-485-a, section 4.2.6 (80v for 15ms at a 1% duty cycle). 19. does not apply to the isl31485e. the isl31485e has no rx enable function, and thus no shdn function. 20. see ?caution? statement in the ?recommended operating conditions? section on page 9. test circuits and waveforms figure 1a. v od and v oc figure 1b. 1b figure 1. dc driver test circuits electrical specifications test conditions: v cc = 4.5v to 5.5v, v l = v cc ; unless otherwise specified. typicals are at v cc = 5v, t a = +25c (note 8). boldface limits apply over the operating temperature range, -40c to +85c. (continued) parameter symbol test conditions temp (c) min (note 16) typ max (note 16) units d de di v l or v cc v od v oc r l /2 r l /2 z y d de di v l or v od 375 375 z y v cm v cc r l /2 r l /2 v oc
ISL31480E, isl31483e, isl31485e, isl31486e 12 fn7638.0 june 25, 2010 figure 2a. test circuit figure 2b. measurement points figure 2. driver propagation delay and differential transition times figure 3a. test circuit figure 3b. measurement points figure 3. driver enable and disable times figure 4a. test circuit figure 4b. measurement points figure 4. driver data rate test circuits and waveforms (continued) d de di v l or v cc signal generator r d z y 375 * 375 * c d v cm *only used for common mode load tests out (z) lower of 0v 50% 50% v oh v ol out (y) t plh t phl diff out (y - z) t r +v od -v od 90% 90% t f 10% 10% di skew = |t plh - t phl | 3v or v l d de di z y v cc gnd sw parameter output re di sw c l (pf) t hz y/z x 1/0 gnd 50 t lz y/z x 0/1 v cc 50 t zh y/z 0 (note 12) 1/0 gnd 100 t zl y/z 0 (note 12) 0/1 v cc 100 t zh(shdn) y/z 1 (note 15) 1/0 gnd 100 t zl(shdn) y/z 1 (note 15) 0/1 v cc 100 signal generator 110 c l out (y, z) lower of 0v 50% 50% v oh 0v v oh - 0.5v t hz out (y, z) v cc v ol v ol + 0.5v t lz de output high output low t zl , t zl(shdn) t zh , t zh(shdn) note 13 2.3v 2.3v note 13 note 13 3v or v l d de di v l or v cc signal generator z y c d v od + - 54 lower of 0v diff out (y - z) +v od -v od di 0v 3v or v l
ISL31480E, isl31483e, isl31485e, isl31486e 13 fn7638.0 june 25, 2010 figure 5a. test circuit figure 5b. measurement points figure 5. receiver propag ation delay and data rate figure 6a. test circuit figure 6b. measurement points figure 6. receiver enable and disable times test circuits and waveforms (continued) signal generator r ro re a b 15pf signal generator v cm ro v cm + 750mv v cm - 750mv t plh v cm v cm v cc or v l 0v 50% 50% t phl a b 1k v l gnd sw parameter de a sw t hz 0+1.5vgnd t lz 0 -1.5v v l / v cc t zh (note 12) 0 +1.5v gnd t zl (note 12) 0 -1.5v v l / v cc t zh(shdn) (note 16) 0 +1.5v gnd t zl(shdn) (note 16) 0 -1.5v v l / v cc signal generator r ro re a b 15pf or v cc ro lower of 0v 50% 50% v oh 0v 1.5v v oh - 0.5v t hz ro v l v ol 1.5v v ol + 0.5v t lz re output high output low t zl , t zl(shdn) t zh , t zh(shdn) note 13 note 13 note 13 3v or v l v cc or
ISL31480E, isl31483e, isl31485e, isl31486e 14 fn7638.0 june 25, 2010 application information rs-485 and rs-422 are differential (balanced) data transmission standards used for long haul or noisy environments. rs-422 is a subset of rs-485, so rs-485 transceivers are also rs-422 compliant. rs-422 is a point-to-multipoint (multidrop) standard, which allows only one driver and up to 10 (assuming one unit load devices) receivers on each bus. rs-485 is a true multipoint standard, which allows up to 32 one unit load devices (any combination of drivers and receivers) on each bus. to allow for multipoint operation, the rs-485 specification requires that drivers must handle bus contention without sustaining any damage. another important advantage of rs-485 is the extended common mode range (cmr), which specifies that the driver outputs and receiver inputs withstand signals that range from +12v to -7v. rs-422 and rs-485 are intended for runs as long as 4000?, so the wide cmr is necessary to handle ground potential differences, as well as voltages induced in the cable by external fields. the isl3148xe is a family of ruggedized rs-485 transceivers that improves on the rs-485 basic requirements, and therefore in creases system reliability. the cmr increases to 25v, while the rs-485 bus pins (receiver inputs and driver outputs) include fault protection against voltages and transients up to 60v. additionally, larger than required differential output voltages (v od ) increase noise immunity. receiver (rx) features these devices utilize a differential input receiver for maximum noise immunity and common mode rejection. input sensitivity is better than 200mv, as required by the rs-422 and rs- 485 specifications. receiver input (load) current surpasses the rs-422 specification of 3ma, and is four times lower than the rs-485 ?unit load (ul)? requirement of 1ma maximum. thus, these products are known as ?one-quarter ul? transceivers, and there can be up to 128 of these devices on a network while still co mplying with the rs-485 loading specification. the rx functions with common mode voltages as great as 25v, making them ideal for industrial, or long networks where induced voltages are a realistic concern. all the receivers include a ?full fail-safe? function that guarantees a high level receiv er output if the receiver inputs are unconnected (floating), shorted together, or connected to a terminated bus with all the transmitters disabled (i.e., an idle bus). rx outputs feature high drive levels (typically 22ma @ v ol = 1v) to ease the design of optically coupled isolated interfaces. except for the isl31485e, rx outputs are three-statable via the active low re input. the rx includes noise filtering circuitry to reject high frequency signals, and typically rejects pulses narrower than 50ns (equivalent to 20mbps). driver (tx) features the rs-485/rs-422 driver is a differential output device that delivers at least 1.5v across a 54 load (rs-485), and at least 2.4v across a 100 load (rs-422). the drivers feature low propagation delay skew to maximize bit width, and to minimize emi, and all drivers are three- statable via the active high de input. the driver outputs are slew rate limited to minimize emi, and to minimize reflections in unterminated or improperly terminated networks. high overvoltage (fault) protection increases ruggedness note: the available smaller pitch packages (e.g., msop and tdfn) may not meet the creepage and clearance (c&c) requirements for 60v levels. the user is advised to determine his c&c requirements before selecting a package type. the 60v (referenced to the ic gnd) fault protection on the rs-485 pins, makes these transceivers some of the most rugged on the market. this level of protection makes the isl3148xe perfect for applications where power (e.g., 24v and 48v supplies) must be routed in the conduit with the data lines, or for outdoor applications where large transients are likely to occur. when power is routed with the data lines, even a momentary short between the supply and data lines will destroy an unprotected device. the 60v fault levels of this family are at least five times higher than the levels specified for standard rs-485 ics. the isl3148xe protection is active whether the tx is enab led or disabled, and even if the ic is powered down. if transients or voltages (including overshoots and ringing) greater then 60v are possible, then additional external protection is required. widest common mode voltage (cmv) tolerance improves operating range rs-485 networks operating in industrial complexes, or over long distances, are susceptible to large cmv variations. either of these operating environments may suffer from large node-to-node ground potential differences, or cmv pickup from external electromagnetic sources, and devices with only the minimum required +12v to -7v cmr may malfunction. the isl3148xe?s extended 25v cmr is the widest available, allowing operation in environments that would overwhelm lesser transceivers. additionally, the rx will not phase invert (erroneously change state) even with cmvs of 40v, or differential voltages as large as 40v. cable invert (polarity reversal) function with large node count rs-485 networks, it is common for some cable data lines to be wired backwards during installation. when this happens the node is unable to communicate over the network. once a technician finds the miswired node, he must then rewire the connector which is time consuming.
ISL31480E, isl31483e, isl31485e, isl31486e 15 fn7638.0 june 25, 2010 the isl31483e, isl31485e, and isl31486e simplify this task by including cable invert pins (inv, dinv, rinv) that allow the technician to invert the polarity of the rx input and/or the tx output pins simply by moving a jumper to change the state of the invert pin(s). when the invert pin(s) is low, the ic operates like any standard rs-485 transceiver and the bus pins have their normal polarity definition of a and y being noninverting, and b and z being inverting. with the invert pin high, the corresponding bus pins reverse their polarity, so b and z are now noninverting and a and y become inverting. intersil?s unique cable invert function is superior to that found on competing devices because the rx full failsafe function is maintained even when the rx polarity is reversed. competitor devices implement the rx invert function simply by invertin g the rx output. this means that with the rx inputs floating or shorted together, the rx appropriately delivers a logic 1 in normal polarity, but outputs a logic low when the ic is operated in the inverted mode. intersil?s innovative rx design guarantees that with the rx inputs floating, or shorted together (v id =0v), the rx output remains high regardless of the state of the invert pins. the full duplex isl31483e includes two invert pins that allow for separate control of the rx and tx polarities. if only the rx cable is miswired, then only the rinv pin need be driven to a logic 1. if the tx cable is miswired, then dinv must be connected to a logic high. the two half duplex versions have only one logic pin (inv) that, when high, switches the polari ty of both the tx and the rx blocks. logic supply (v l pin) note: power up v cc before powering up the v l supply, and keep v l v cc . the ISL31480E and isl31486e include a v l pin that powers the logic inputs (tx input and control pins) and the rx output. these pins interface with ?logic? devices such as uarts, asics, and controllers, and today many of these devices use power supplies significantly lower than 5v. thus, a 5v output level from this transceiver ic might seriously overdrive and damage the logic device input (see figure 7). similarly, the logic device?s low v oh might not exceed the v ih of a 5v powered transceiver input. connecting the v l pin to the power supply of the logic device - as shown in figure 7 - limits the isl3148xe?s ro pin v oh to the v l voltage, and reduces the tx and control input switching points to values compatible with the logic device output levels. tailoring the logic pin input switching points and output levels to th e supply voltage of the uart, asic, or controller eliminates the need for a level shifter/translator between the two ics. v l can be anywhere from v cc down to 1.62v, and the transceivers easily operate at the 1mbps data rate over this range as long as the vcm doesn?t exceed 15v. table 2 indicates typical v ih and v il values for various v l voltages so the user can ascertain whether or not a particular v l voltage meets his/her needs. the v l supply current (i l ) is typically less than 6a. all of the dc v l current is due to current through the de input internal pull-up resistor when the pin is driven to the low input state. transceiver logic inputs that are externally tied high in an application should use the v l supply for the high voltage level to minimize input currents. except for di, all logic inputs have 800k pull-up (de) or pull-down (all other pins) resistors, so connecting an input to the lower voltage v l supply minimizes current. the de pull-up internally connects to v l , so connecting the de pin to v cc induces an input current of (v cc - v l )/800k . high v od improves noise immunity and flexibility the isl3148xe driver design delivers larger differential output voltages (v od ) than the rs-485 standard requires, or than most rs-485 transmitters can deliver. the typical 2.5v v od provides more noise immunity than networks built using many other transceivers. another advantage of the large v od is the ability to drive more than two bus terminations, which allows for table 2. v ih and v il vs. v l for v cc = 5v v l (v) v ih (v) v il (v) 1.6 1.0 0.6 1.8 1.1 0.7 2.3 1.3 0.9 2.7 1.4 1.1 3.3 1.6 1.3 figure 7. using v l pin to adjust logic levels gnd r xd t xd v cc = +1.8v uart/processor gnd ro di v cc = +5v isl31483e v oh 1.8v v oh = 5v v ih 2v esd diode gnd r xd t xd v cc = +1.8v uart/processor gnd ro di v cc = +5v ISL31480E v oh 1.8v v oh = 1.8v v ih = 1.1v esd diode v l
ISL31480E, isl31483e, isl31485e, isl31486e 16 fn7638.0 june 25, 2010 utilizing the isl3148xe in ?star? and other multi-terminated, nonstandard network topologies. figure 9, details the transmitter?s v od vs i out characteristic, and includes load lines for four (30 ) and six (20 ) 120 terminations. the figure shows that the driver typically delivers 1.3v into six terminations, and the ?electrical specification? table guarantees a v od of 0.8v at 21 over the full temperature range. the rs-485 standard requires a minimum 1.5v v od into two terminations, but the isl3148xe deliver rs-485 voltage levels with 2x to 3x the number of terminations. hot plug function when a piece of equipment powers up, there is a period of time where the processor or asic driving the rs-485 control lines (de, re ) is unable to ensure that the rs-485 tx and rx outputs are kept disabled. if the equipment is connected to the bus, a driver activating prematurely during power-up may crash the bus. to avoid this scenario, the isl3148xe devices incorporate a ?hot plug? function. circuitry monitoring v cc ensures that, during power-up and power-down, the tx and rx outputs remain disabled, regardless of the state of de and re , if v cc is less than 3.5v. this gives the processor/asic a chance to stabilize and drive the rs-485 control lines to the proper states. figure 8 illustrates the power-up and power-down performance of the isl3148xe compared to an rs-485 ic without the hot plug feature. data rate, cables, and terminations rs-485/rs-422 are intended for network lengths up to 4000?, but the maximum system data rate decreases as the transmission length increases. these 1mbps versions can operate at full data rates with lengths up to 800? (244m). jitter is the limiting pa rameter at this data rate, so employing encoded data streams (e.g., manchester coded or return-to-zero) may allow increased transmission distances. twisted pair is the cable of choice for rs-485/rs-422 networks. twisted pair cables tend to pick up noise and other electromagnetically induced voltages as common mode signals, which are effectively rejected by the differential receivers in these ics. proper termination is imperative to minimize reflections, and terminations are recommended unless power dissipation is an overriding concern. in point-to-point, or point-to- multipoint (single driver on bus like rs-422) networks, the main cable should be terminated in its characteristic impedance (typically 120 ) at the end farthest from the driver. in multi-receiver applications, stubs connecting receivers to the main cable sh ould be kept as short as possible. multipoint (multi-driver) systems require that the main cable be terminated in its characteristic impedance at both ends. stubs connecting a transceiver to the main cable should be kept as short as possible. built-in driver overload protection as stated previously, the rs-485 specification requires that drivers survive worst case bus contentions undamaged. these transceivers meet this requirement via driver output short circuit current limits, and on-chip thermal shutdown circuitry. the driver output stages incorporate a double foldback short circuit current limiting scheme which ensures that the output current never exceeds the rs-485 specification, even at the common mode and fault condition voltage range extremes. the first foldback current level ( 70ma) is set to ensure that the driver never folds back when driving loads with common mode voltages up to 25v. the very low second foldback current setting ( 9ma) minimizes power dissipation if the tx is enabled when a fault occurs. in the event of a major short circuit condition, devices also include a thermal shutdown feature that disables the drivers whenever the die temperature becomes excessive. this eliminates the power dissipation, allowing the die to cool. the drivers automatically re-enable after the die temperature drops about 15c. if the contention persists, the thermal shutdown/re- enable cycle repeats until the fault is cleared. receivers stay operational during thermal shutdown. low power shutdown mode these cmos transceivers all use a fraction of the power required by competitive devices, but they also include a shutdown feature (except the isl31485e) that reduces the already low quiescent i cc to a 10a trickle. these devices enter shutdown whenever the receiver and driver are simultaneously disabled (re =v cc and de = gnd) for a period of at least 600ns. disabling both the driver and the receiver for less than 60ns guarantees that the transceiver will not enter shutdown. note that receiver and driver enable times increase when the transceiver enables from shutdown. refer to notes 11, 12, 13, 14 and 15, at the end of the ?electrical specification? table on page 11, for more information. figure 8. hot plug performance ( isl3148xe ) vs isl83088e without hot plug circuitry time (40s/div) vcc receiver output (v) driver y output (v) 2.5 5.0 2.5 5.0 vcc (v) rl = 1k ro 0 2.5 5.0 0 0 a/y rl = 1k 3.5v re = gnd de, di = v cc 2.8v isl3148xe isl3148xe
ISL31480E, isl31483e, isl31485e, isl31486e 17 fn7638.0 june 25, 2010 typical performance curves v cc = 5v, t a = +25c; unless otherwise specified. figure 9. driver output current vs differential output voltage figure 10. driver differential output voltage vs temperature figure 11. supply current vs temperature figure 12. receiver output current vs receiver output voltage figure 13. bus pin curr ent vs bus pin voltage differential output voltage (v) driver output current (ma) 0123 45 0 10 20 30 40 50 60 70 80 90 +25c rd = 54 rd = 100 rd = 30 rd = 20 +85c -40 0 50 85 temperature (c) differential output voltage (v) -25 25 75 rd = 54 rd = 100 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 -40 0 50 85 temperature (c) icc (ma) -25 25 75 2.00 2.05 2.10 2.15 2.20 2.25 2.30 2.35 2.40 2.45 de = vcc, re = x de = gnd, re = gnd receiver output voltage (v) receiver output current (ma) -30 -20 -10 0 10 20 30 40 50 60 70 voh, +25c voh, +85c vol, +25c vol, +85c 012345 bus pin voltage (v) bus pin current (a) -600 -400 -200 0 200 400 600 800 -70 -50 -30 -10 0 10 30 50 70 a/y or b/z y or z
ISL31480E, isl31483e, isl31485e, isl31486e 18 fn7638.0 june 25, 2010 figure 14. driver differential propagation delay vs temperature figure 15. driver differential skew vs temperature figure 16. 25v receiver performance figure 17. driver and receiver waveforms die characteristics substrate potential (power ed up) and tdfn epad: gnd process: si gate bicmos typical performance curves v cc = 5v, t a = +25c; unless otherwise specified. (continued) -40 0 50 85 temperature (c) -25 25 75 propagation delay (ns) 50 55 60 65 70 75 80 85 tplh tphl rd = 54 , cd = 50pf -40 0 50 85 temperature (c) skew (ns) -25 25 75 2.0 2.5 3.0 3.5 4.0 |tplh - tphl| rd = 54 , cd = 50pf time (400ns/div) voltage (v) -25 -20 -15 -10 -5 0 5 ro a b 0 5 10 15 20 25 ro a b vid = 1v time (400ns/div) receiver output (v) rd = 54 , cd = 50pf 0 5 driver output (v) 0 5 driver input (v) di ro a/y - b/z -3 -2 -1 0 1 2 3
ISL31480E, isl31483e, isl31485e, isl31486e 19 fn7638.0 june 25, 2010 products intersil corporation is a leader in the design and manuf acture of high-performance analog semiconductors. the company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. intersil's product families address power management and analog signal processing functions. go to www.intersil.com/products for a complete list of intersil product families. *for a complete listing of applications, related documentat ion and related parts, please see the respective device information page on intersil.com: ISL31480E, isl31483e, isl31485e, isl31486e to report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff fits are available from our website at http://rel.intersil.com/reports/search.php revision history the revision history provided is for informat ional purposes only and is believed to be accurate, but not warranted. please go t o web to make sure you have the latest rev. date revision change 06/25/10 fn7638.0 initial release
ISL31480E, isl31483e, isl31485e, isl31486e 20 fn7638.0 june 25, 2010 mini small outline pl astic packages (msop) notes: 1. these package dimensions are wi thin allowable dimensions of jedec mo-187ba. 2. dimensioning and tolerancing per ansi y14.5m - 1994. 3. dimension ?d? does not include mold flash, protrusions or gate burrs and are measured at datum plane. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e1? does not includ e interlead flash or protrusions and are measured at datum plane. interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. formed leads shall be planar wi th respect to one another within 0.10mm (.004) at seating plane. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension ?b? does not include dambar protrusion. allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of ?b? dimension at maximum ma terial condition. minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. datums and to be determined at datum plane . 11. controlling dimension: millimeter. converted inch dimen- sions are for reference only l 0.25 (0.010) l1 r1 r 4x 4x gauge plane seating plane e e1 n 12 top view index area -c- -b- 0.20 (0.008) a b c seating plane 0.20 (0.008) c 0.10 (0.004) c -a- -h- side view b e d a a1 a2 -b- end view 0.20 (0.008) c d e 1 c l c a - h - -a - - b - - h - m10.118 (jedec mo-187ba) 10 lead mini small outline plastic package symbol inches millimeters notes min max min max a 0.037 0.043 0.94 1.10 - a1 0.002 0.006 0.05 0.15 - a2 0.030 0.037 0.75 0.95 - b 0.007 0.011 0.18 0.27 9 c 0.004 0.008 0.09 0.20 - d 0.116 0.120 2.95 3.05 3 e1 0.116 0.120 2.95 3.05 4 e 0.020 bsc 0.50 bsc - e 0.187 0.199 4.75 5.05 - l 0.016 0.028 0.40 0.70 6 l1 0.037 ref 0.95 ref - n10 107 r 0.003 - 0.07 - - r1 0.003 - 0.07 - - 5 o 15 o 5 o 15 o - 0 o 6 o 0 o 6 o - rev. 0 12/02
ISL31480E, isl31483e, isl31485e, isl31486e 21 fn7638.0 june 25, 2010 package outline drawing l10.3x3a 10 lead thin dual flat no-lead plastic package rev 5, 3/10 located within the zone indicated. the pin #1 identifier may be unless otherwise specified, tolerance : decimal 0.05 tiebar shown (if present) is a non-functional feature. the configuration of the pin #1 identifier is optional, but must be between 0.15mm and 0.30mm from the terminal tip. dimension applies to the metallized terminal and is measured dimensions in ( ) for reference only. dimensioning and tolerancing c onform to asme y14.5m-1994. 6. either a mold or mark feature. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: bottom view detail "x" side view typical recommended land pattern top view index area (10 x 0.50) (2.90) ( 8x 0 .50 ) ( 10x 0.25 ) (1.50) 0 . 05 max. 0 . 00 min. 0 . 2 ref 5 (4x) ( 2.30 ) 3.00 0.15 0 .80 max 2.30 10 see detail "x" 0.10 c 5 1.50 index area b 3.00 a pin 1 6 pin 1 6 1 2.0 ref 8x 0.50 bsc 5 c seating plane c 0.08 b c 0.10 m a 10 x 0.25 4 m 0.05 c 10x 0 . 30 c angular 2.50 compliant to jedec mo-229-weed-3 except exposed pad length (2.30mm). 7.
ISL31480E, isl31483e, isl31485e, isl31486e 22 fn7638.0 june 25, 2010 thin dual flat no-lea d plastic package (tdfn) c // l c e terminal tip for even terminal/side nx (b) section "c-c" 5 (a1) bottom view a 6 area index c 0.10 0.08 side view 0.15 2x e a b c 0.15 d top view cb 2x 6 8 area index nx l e2 e2/2 ref. e n (nd-1)xe (datum a) (datum b) 5 0.10 8 7 d2 b a m c n-1 12 plane seating c a a3 nx b d2/2 nx k l l12.4x3a 12 lead thin dual flat no-lead plastic package (compliant to jedec mo-229-wged-4 issue c) symbol millimeters notes min nominal max a 0.70 0.75 0.80 - a1 - - 0.05 - a3 0.20 ref - b 0.18 0.23 0.30 5,8 d 4.00 bsc - d2 3.15 3.30 3.40 7,8 e 3.00 bsc - e2 1.55 1.70 1.80 7,8 e 0.50 bsc - k0.20 - - - l 0.30 0.40 0.50 8 n122 nd 6 3 rev. 0 1/06 notes: 1. dimensioning and tolerancing conform to asme y14.5-1994. 2. n is the number of terminals. 3. nd refers to the number of terminals on d. 4. all dimensions are in millimeters. angles are in degrees. 5. dimension b applies to the meta llized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. the configuration of the pin #1 identifier is optional, but must be located within the zone indicated. the pin #1 identifier may be either a mold or mark feature. 7. dimensions d2 and e2 are fo r the exposed pads which provide improved electrical and thermal performance. 8. nominal dimensions are prov ided to assist with pcb land pattern design efforts, see intersil technical brief tb389.
ISL31480E, isl31483e, isl31485e, isl31486e 23 fn7638.0 june 25, 2010 package outline drawing m14.15 14 lead narrow body small outline plastic package rev 1, 10/09 a d 4 0.25 a-b mc c 0.10 c 5 b d 3 0.10 a-b c 4 0.20 c 2x 2x 0.10 d c 2x h 0.10 c 6 3 6 id mark pin no.1 (0.35) x 45 seating plane gauge plane 0.25 (5.40) (1.50) 1.27 0.31-0.51 4 4 detail"a" 0.220.03 0.10-0.25 1.25 min 1.75 max (1.27) (0.6) 6.0 8.65 3.9 7 14 8 dimensioning and tolerancing conform to amsey14.5m-1994. dimension does not include interlead flash or protrusions. dimensions in ( ) for reference only. interlead flash or protrusions shall not exceed 0.25mm per side. datums a and b to be determined at datum h. 4. 5. 3. 2. dimensions are in millimeters. notes: 1. the pin #1 indentifier may be either a mold or mark feature. 6. does not include dambar protrusion. allowable dambar protrusion 7. reference to jedec ms-012-ab. shall be 0.10mm total in excess of lead width at maximum condition. detail "a" side view typical recommended land pattern top view
ISL31480E, isl31483e, isl31485e, isl31486e 24 intersil products are manufactured, assembled and tested utilizing iso9000 qu ality systems as noted in the quality certifications found at www.intersil.com/design/quality intersil products are sold by description only. intersil corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, th e reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is believed to be accura te and reliable. however, no re sponsibility is assumed by inte rsil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which ma y result from its use. no licen se is granted by implication o r otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com fn7638.0 june 25, 2010 for additional products, see www.intersil.com/product_tree small outline plast ic packages (soic) index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 c h 0.25(0.010) b m m notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e? does not include in terlead flash or protrusions. inter- lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width ?b?, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. controlling dimension: millimete r. converted inch dimensions are not necessarily exact. m8.15 (jedec ms-012-aa issue c) 8 lead narrow body small outline plastic package symbol inches millimeters notes min max min max a 0.0532 0.0688 1.35 1.75 - a1 0.0040 0.0098 0.10 0.25 - b 0.013 0.020 0.33 0.51 9 c 0.0075 0.0098 0.19 0.25 - d 0.1890 0.1968 4.80 5.00 3 e 0.1497 0.1574 3.80 4.00 4 e 0.050 bsc 1.27 bsc - h 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 l 0.016 0.050 0.40 1.27 6 n8 87 0 8 0 8 - rev. 1 6/05

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